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binutils package

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94.
The input and output files must be distinct
(no translation yet)
Located in as.c:1263
2531.
-mfix-loongson2f-jump[tab]work around Loongson2F JUMP instructions
-mfix-loongson2f-nop[tab]work around Loongson2F NOP errata
-mfix-vr4120[tab][tab]work around certain VR4120 errata
-mfix-vr4130[tab][tab]work around VR4130 mflo/mfhi errata
-mfix-24k[tab][tab]insert a nop after ERET and DERET instructions
-mfix-cn63xxp1[tab][tab]work around CN63XXP1 PREF errata
-mgp32[tab][tab][tab]use 32-bit GPRs, regardless of the chosen ISA
-mfp32[tab][tab][tab]use 32-bit FPRs, regardless of the chosen ISA
-msym32[tab][tab][tab]assume all symbols have 32-bit values
-O0[tab][tab][tab]do not remove unneeded NOPs, do not swap branches
-O, -O1[tab][tab][tab]remove unneeded NOPs, do not swap branches
-O2[tab][tab][tab]remove unneeded NOPs and swap branches
--trap, --no-break[tab]trap exception on div by 0 and mult overflow
--break, --no-trap[tab]break exception on div by 0 and mult overflow
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(no translation yet)
Located in config/tc-mips.c:20023
3019.
RISC-V options:
-fpic generate position-independent code
-fno-pic don't generate position-independent code (default)
-march=ISA set the RISC-V architecture
-mabi=ABI set the RISC-V ABI
-mrelax enable relax (default)
-mno-relax disable relax
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(no translation yet)
Located in config/tc-riscv.c:2999
3080.
Source register for %s must be smaller that the destination register
(no translation yet)
Located in config/tc-s12z.c:1317
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Contributors to this translation: Antho, Antoine Quintallet, Camille, Christophe Painchaud, David, François, FredBezies, Frédéric Marchal, Geode, Jean-Marc, Michaël Delache, Michel Robitaille, NSV, Pierre Slamich, Thierry Moisan, Thomas Duboucher, Vincent Esposito, Yannick, Yvan, benzen, cedric santran, joel, jphlechene, lucas, setesat, slong, timothée ruffenach.