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binutils package

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507.
base register written back, and overlaps second destination register
(no translation yet)
Located in config/tc-arm.c:7768
508.
index register overlaps destination register
(no translation yet)
Located in config/tc-arm.c:7776
516.
'CPSR' or 'SPSR' expected
(no translation yet)
Located in config/tc-arm.c:7616 config/tc-arm.c:10444
556.
base register should not be in register list when written back
(no translation yet)
Located in config/tc-arm.c:9657
558.
value stored for r%d is UNPREDICTABLE
(no translation yet)
Located in config/tc-arm.c:9666 config/tc-arm.c:9732 config/tc-arm.c:9772
759.
AVR options:
-mmcu=[avr-name] select microcontroller variant
[avr-name] can be:
avr1 - classic AVR core without data RAM
avr2 - classic AVR core with up to 8K program memory
avr25 - classic AVR core with up to 8K program memory
plus the MOVW instruction
avr3 - classic AVR core with up to 64K program memory
avr31 - classic AVR core with up to 128K program memory
avr35 - classic AVR core with up to 64K program memory
plus the MOVW instruction
avr4 - enhanced AVR core with up to 8K program memory
avr5 - enhanced AVR core with up to 64K program memory
avr51 - enhanced AVR core with up to 128K program memory
avr6 - enhanced AVR core with up to 256K program memory
or immediate microcontroller name.
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(no translation yet)
Located in config/tc-avr.c:380
794.
BFIN specific command line options:
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(no translation yet)
Located in config/tc-bfin.c:423
1108.
Invalid Bit Branch Condition: %c
(no translation yet)
Located in config/tc-hppa.c:4132
1205.
64bit mode not supported on this CPU.
(no translation yet)
Located in config/tc-i386.c:1867
1206.
32bit mode not supported on this CPU.
(no translation yet)
Located in config/tc-i386.c:1871
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Contributors to this translation: Andrii Prokopenko, Sergiy Matrunchyk, yurchor.